Hardware-Software Co-design: Tools for Architecting Systems-On-A-Chip

5/16/97


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Table of Contents

Hardware-Software Co-design: Tools for Architecting Systems-On-A-Chip

Outline

A System Architecture: Today

A System Architecture: Tomorrow

Embedded Computing Systems

Embedded Computing

EC Application Classes

Co-Design Problem Areas

Co-Design Problems

Role of Compilation & Synthesis

PPT Slide

Co-synthesis

1. Presynthesis Optimizations

Timed Decision Tables

Execution Semantics

TDT Based Control Optimization

Column Elimination Using Espresso

Pre-Synthesis Optimization Flow

TDT Optimization Results

2. Architectural Validation

Design Context: AA Architectures

Architectural Macro-View

Custom Mechanisms Explored

AA Through Performance Monitoring (continuing work)

The Problem in Architectural Validations

What is Great About DES Models?

What is wrong with DES Models Programmed in HLLs?

System Simulations

Our Approach

Program-Driven System Simulation

Examples

Simulation Workbench

Applications

Prefetching Experiments

Experimental Results: Simulation Speed

Simulation Results: Computation Kernels

Simulation Results: Computation Kernels

Simulation Results: Computation Kernels

Application Data Structure Optimization

Application Data Optimization (contd)

Aggregate Hardware Cost Analysis

Back to Co-Design Tools: Where are we?

Summary

Summary

Pointers

Background and Recent Related Works

Author: ICS

Email: rgupta@ics.uci.edu

Home Page: http://www.ics.uci.edu/~rgupta

Other information:
Asia and South-Pacific Design Automation Conference, January 1997 Talk on Co-design

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