Date: January 17-19, 2005
Place: Oahu, Hawaii
Location: Turtle Bay Resort
Sponsored by
Center for Embedded Computer Systems, UC Irvine
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Local Arrangements Chair: Alex Veidenbaum
Workshop description
Submission
Participants
Local Arrangements
Preliminary Program
IWIA Steering Committee
This invited workshop aims to bring together researchers and designers from academia and industry to discuss directions in the development of high-performance, parallel, distributed, and multimedia processors and systems. The workshop invitees are computer architects and compiler, operating system, and application experts. The main goal of the workshop is to discuss future trends in the development of architecture and software systems and to explore the assumptions made by the architects about software systems and by software writers about architecture. The increased complexity in each of these areas calls for increased interaction with researchers from all of the other disciplines to accurately assess the potential directions and future trends in architecture and systems.
The main themes of the workshop are software- and technology-driven and constrained new architectures, compiler/architecture interaction and co-design, and application requirements and characteristics. Both numerical and non-numerical applications, such as database, data mining, Web- and Java-based, and (high-performance) embedded applications, are of interest. In all cases a longer-term view and assessment of the future is of most interest.
This year's special focus is embedded chip multiprocessors. Today's embedded systems have very high processing requirements that naturally lead to the use of multiprocessors. At the same time technology advances already allow a multiprocessor to be put on a single chip with ever large chip multiprocessors likely in the near futrue. The main difference between standard and embedded chip multiprocessors is the overriding concern with cost and power in the embedded case. Design, compilation, power management, application area requirements, and performance evaluation of embedded chip multiprocessors are the 2005 special topics.
Other topics of interest include but are not limited to the following:
The workshop will consist of sessions combining individual presentations with discussion. Presentations will be limited to ~20 min to provide sufficient time for discussion. An ideal presentation will concentrate on trends and future directions in addition to recently obtained results. Speculation is encouraged.
Workshop participation is capped at 25 invitees.
Submission and Publication
The invitees wishing to make a presentation should submit an extended abstract, up to 3 pages, by 1/3/05. Submissions should be electronic in pdf format. The abstracts will be reviewed and printed in the on-site proceedigns.
The final proceedings consisting of full papers will be published by IEEE Computer Society Press after the meeting. The papers will undergo an additional review process and be selected for publication in the post-proceedings. Papers will be due by April 1st 2005.
Publication instructions will be distributed by CS Press at a later date.
USA
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To be announced |
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