Quarterly Reports
Papers and Technical Reports
- Integrated I-cache Way Predictor and Branch Target Buffer to Reduce Energy Consumption In 4th Intl. Symp. on High Performance Computing., May, 2002. (PostScript format, PDF format)
- Power Savings in Embedded Processors through Decode Filter Cache, In Design, Automation & Test in Europe., March, 2002. (PostScript format, PDF format)
- Fetch Size Adaptation vs. Stream Buffer for Media Benchmarks, 3rd Workshop on Media and Streaming Processors (in conjunction with 34th Intl. Symp. on Microarchitecture, Dec. 2001, (PostScript format, PDF format)
- Architectures Adaptation for Power and Performance, International Conference on ASIC, Oct. 2001, (PostScript format, PDF format)
- Power Savings in Embedded Processors through Decode Filter Cache, UC, Irvine, Technical Report ICS-TR-01-63, Sep. 2001, (PostScript format, PDF format)
- Fetch Size Adaptation vs. Stream Buffer for Media Benchmarks, UC, Irvine, Technical Report ICS-TR-01-62, Sep. 2001, (PostScript format, PDF format)
- Design of a Predictive Filter Cache for Energy Savings in High Performance Processor Architectures, International Conference on Computer Design, Sep. 2001, (PostScript format, PDF format)
- Static Analysis of Parameterized Loop Nests for Energy Efficient
Use of Data Caches, COLP'01 Sept.7 2001 Spain (PDF format)
- A Quantitative Evaluation of Adaptive Memory Hierarchy. UC, Irvine, Technical Report ICS-TR-01-41(PDF format)
- Simultaneous Way-footprint Prediction and Branch Prediction for Energy Savings in Set-associative Instruction Caches, IEEE Workshop on Power Management for Real-Time and Embedded Systems, May 2001, (PostScript format, PDF format)
- Design of a Predictive Filter Cache for Energy Savings in High Performance Processor Architectures, UC, Irvine, Technical Report ICS-TR-01-61, April 2001, (PostScript format, PDF format)
- Simultaneous Way-footprint Prediction and Branch Prediction for Energy Savings in Set-associative Instruction Caches, UC, Irvine, Technical Report ICS-TR-01-60, April 2001, (PostScript format, PDF format)
- Compiler-Directed Cache Line Size Adaptivity, IMA 2000, November 2000, (PostScript format, PDF format)
- Compiler-Directed Cache Assist Adaptivity, ISHPC 2000, October 2000, (PostScript format, PDF format)
- AMRM Prototype Board Software API, UC, Irvine,
Technical Report ICS-TR-00-38, June 2000, (PostScript format, PDF format)
- Compiler-Directed Cache Assist Adaptivity, UC, Irvine,
Technical Report ICS-TR-00-17, June 2000, (PostScript format, PDF format)
- AMRM Prototype Board Design and Implementation, UC, Irvine,
Technical Report ICS-TR-00-37, December 1999, (PostScript format, PDF format)
- Cache with Adaptive Fetch Size, UC, Irvine, Technical Report ICS-TR-00-16, April 2000, (PostScript format, PDF format)
- Conflict Miss Elimination by Time-stride Prefetch, UC, Irvine, Technical Report ICS-TR-00-15, March 2000, (PostScript format, PDF format)
- Adaptive Line Size Cache, UC, Irvine, Technical Report ICS-TR-99-56, Nov. 1999, (PostScript format, PDF format)
- Adapting Cache Line Size to Application Behavior, International Conference on Supercomputing, June 1999, ICS99 (PostScript format, PDF format)
- Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor, FCCM99 (PostScript format, PDF format)
- Architectural Adaptation in MORPH, Proceedings of SPIE Workshop on Configurable Computing, Oct 1998 (PDF format)
- Analysis of Technology Trends: Making A Case for Architectural Adaptation in Custom Data-Paths (PDF format)
- Hardware Support for Process Protection in Existing Processors and Processors with reconfigurable hardwares (Postscript format, PDF format)
AMRM Presentations
- DIS Stressmark Suite
- Adaptive Line Size Cache (Sep. 15, 1999, Postscript format)
- AMRM: Project Technical Approach (Nov. 5, 1998, Powerpoint format)
- Compiling for Reconfigurable Memory Machines: The AMRM Approach (Nov. 5, 1998, Powerpoint format)
- Morph: Supporting Safe Architectural Adaptation (Sep. 1998, Powerpoint format)
- Safe and Protected Execution in Adaptive Architectures (Nov. 5, 1998, Powerpoint format)
- Adaptive Memory Reconfiguration Management: The AMRM Project (Oct. 1998, Powerpoint format)
- Memory Hierarchy Adaptivity - An Architectural Perspective (Sept. 1998, Powerpoint format)
- Miss Stride Buffer (Sept. 1998, Powerpoint format)
- Morph Point Design Study
- MORPH: A System Architecture for Robust High Performance Using Customization (Postscript format)