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Suggested Homeworks (from Textbook): Chapter 3: 3.2(b,c) 3.4(a,d) 3.9 3.11
3.13 3.15 3.21 3.23
3.27 3.28 3.29 3.30 3.32
3.39 3.41 3.42 3.45 3.48 For more information regarding Quizzes and Midterms see the Sample Quizzes/Midterms section. Course Objective : The goal of this course is to learn the basic principles of digital design. The course aims at enabling a student to design small digital systems for different applications starting from abstract specifications or behavioral/structural descriptions. Course Format: The course
has two major mandatory components:
lectures and discussions. Basic concepts and illustrative examples will be
introduced in the lectures; sample problems, as well as some supplemental
material will be covered in the discussion sections. You are responsible for material covered in the
lectures Lectures Discussion Sections Course Announcements
: All announcements will be made
at the beginning of the class, on the CS 151 course web page, and on the CS
151 NoteBoard on Drop Policy: Drops will be permitted until Friday, 10/16. Homework : Suggested homeworks
from the text book are posted as above on the course web page for practice at
home. Evaluation Strategy : Your final grade in this
course will be based on quizzes (50% total), one mid-term exam (20%) and a
comprehensive final exam (30%). We'll drop one quiz with the lowest score. Cheating Policy : If you are not already
familiar with the department's cheating and plagiarism policies and
procedures, read the Cheating Policy document, available from the ICS
Undergraduate Student Affairs Office. Formula for Success in CS 151 : Review lecture material after the class. Who to see
for help: Questions regarding suggested homework problems: TA. |
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Date Topics Reading Review & Combinational Logic Design 9/24 Th
Intro, Boolean Algebra
Vahid 1.1-1.3, 2.5, Appendix A 9/25 Fri Combinational Logic
Design Vahid 2.5-2.7,
2.8-2.13 9/28 M Flip Flops and FSMs
Vahid
3.1-3.2 9/30 W Quiz 1 (Covers Chapters 1 and 2.1-2.13) 10/2 F Flip Flops and FSMs Vahid 3.3-3.4 Sequential Logic Design 10/5 Mon
Controllers and Sequential Design Vahid 3.5, 3.8 10/7 W
Registers, Adders, Shifters Vahid 4.1-4.4 10/9 F Quiz
2 (covers Chapter 3.1-3.4, 3.5, 3.8) Datapath Components **10/12 Mon Comparators, Counters,
Multipliers, Subtractors Vahid
4.5-4.8 **10/14 Wed
ALUs, Registers
Vahid 4.9-4.10, 4.13 **10/16 Fri Quiz 3 (covers Ch 4.1-4.8) Fri 10/16 LAST DATE TO DROP CLASS RTL Design 10/19 Mon RTL Design: Method,
Examples Vahid 5.1-5.3 10/21 W RTL Design: Method,
Examples
Vahid
5.3 10/23 F Quiz 4 (Covers
Chapters 4.9-4.13, 5.1-5.3) 10/26 Mon
RTL Design: Clock Frequency, C-to-Gates Vahid
5.4-5.5 **10/28 W
Memory Components
Vahid 5.6-5.7 10/29 Th MIDTERM
(Covers Chapters 1-5.5) **10/30 F
Memory Components,
Hierarchy
Vahid 5.6-5.8 Optimizations & Tradeoffs **11/2 M
Comb. Logic Optimization & Tradeoffs Vahid 6.1-6.2 11/4 W Comb. Logic Optimization
& Tradeoffs
Vahid 6.2 11/6 Fri Quiz 5 (Covers Chapters 5.5-6.2) 11/9 M Seq. Logic Optimization
& Tradeoffs
Vahid 6.3 11/11 W Veteran’s
Day 11/12 Th Seq. Logic Optimization &
Tradeoffs
Vahid 6.3 11/13 Fri Quiz 6 (Covers Chapters
6.1-6.3) 11/16 M
Datapath Component Tradeoffs Vahid 6.4 11/18 W Datapath
Component Tradeoffs Vahid 6.4 11/20 Fri Quiz 7 (Covers Chapter 6.4) 11/23 M
RTL Design and Optimization Vahid 6.5 11/25 W RTL Design, Optimizations,
Tradeoffs Vahid 6.6-6.7
11/26 Th Thanksgiving Holiday 11/27 Fri
Thanksgiving Holiday
11/30 M
RTL Design, Optimizations, Tradeoffs Vahid
6.6-6.8 12/2 W Quiz 8 (Covers Chapter
6.5-6.7) 12/4 F Course review 12/9 W Comprehensive Final Examination, 8-10
am, PSCB 140 |
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