B3. F. Vahid, T. Givargis.
Programming Embedded Systems - An Introduction to Time-Oriented Programming. www.programmingembeddedsystems.com
B2. A. Nacul, M. Lajolo, T. Givargis.
Interface-Centric Abstraction level for Rapid Hardware/Software Integration, Book Chapter in Applications of Specification And Design Languages for SOCs.
Springer, ISBN: 1-4020-4997-8, July 2006.
B1. F. Vahid, T. Givargis.
Embedded System Design: A Unified Hardware/Software Introduction.
John Wiley and Sons, ISBN: 0471386782, October 2001.
Peer-Reviewed/Archived Journal
J20. C. Huang, F. Vahid, and T. Givargis.
A Custom FPGA Processor for Physical Model Ordinary Differential Equation Solving.
IEEE Embedded Systems Letters, vol. 3, no. 4, pp. 113-116, September 2011.
J19. S. Choudhuri, T. Givargis.
Deterministic Service Guarantees for NAND Flash using Partial Block Cleaning.
Academy Publisher Journal of Software (JSW), vol. 4, no. 7, pp. 728-737, September 2009.
J18. M.A. Ghodrat, T. Givargis, A. Nicolau.
Optimizing Control Flow in Loops using Interval and Dependence Analysis.
Springer Journal on Design Automation of Embedded Systems (DAES), vol. 13, no. 3, pp. 193-221, September 2009.
J17. S. Sirowy, D. Sheldon, T. Givargis, F. Vahid.
Virtual Microcontrollers.
ACM SIGBED Review, vol. 6, no. 1, January 2009.
J16. A. Nacul, T. Givargis.
Synthesis of Time-Constrained Multitasking Embedded Software.
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 11, no. 4, pp. 822-847, October 2006.
J15. M.A. Ghodrat, T. Givargis, A. Nicolau.
Expression Equivalence Checking using Interval Analysis.
IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 14, no. 8, pp. 830-842, August 2006.
J14. C.V. Lopes, A. Haghighat, A. Mandal, T. Givargis, P. Baldi.
Localization of Off-the-Shelf Mobile Devices Using Audible Sound: Architectures, Protocols and Performance Assessment.
ACM Mobile Computing and Communications Review (MC2R), vol. 10, no. 2, pp. 38-50, April 2006.
J13. T. Givargis.
Zero Cost Indexing for Improved Embedded Processor Cache Performance.
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 11, no. 1, pp. 3-25, January 2006. 2006 TODAES Best Paper Award.
J12. T. Givargis, D. Eppstein.
Memory Reference Caching for Activity Reduction on Address Buses.
Elsevier Journal of Microprocessors and Microsystems (MICPRO), vol. 29, no. 4, pp. 145-153, May 2005.
J11. A. Ghosh, T. Givargis.
Cache Optimization for Embedded Processor Cores: An Analytical Approach.
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 9, no. 4, pp. 419-440, October 2004.
J10. A. Nacul, T. Givargis.
Adaptive Cache Management for Low Power Embedded Systems.
Korea Multimedia Society, Key Technology of Next Generation IT, ISSN 1229-778X, pp. 30-39, December 2003.
J9. T. Givargis, F. Vahid, J. Henkel.
Instruction-Based System-level Power Evaluation of System-on-a-Chip Peripheral Cores.
IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 10, no. 6, pp. 856-863, December 2002.
J8. T. Givargis, F. Vahid, J. Henkel.
System-Level Exploration for Pareto-Optimal Configurations in Parameterized System-on-a-Chip.
IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 10, no. 4, pp. 416-422, December 2002.
J7. T. Givargis, F. Vahid.
Platune: A Tuning Framework for System-on-a-Chip Platforms.
IEEE Transactions on Computer Aided Design (TCAD), vol. 21, no. 11, pp. 1317-1327, November 2002.
J6. F. Vahid, T. Givargis, S. Cotterell.
Power Estimator Development for Embedded System Memory Tuning.
Journal of Circuits, Systems, and Computers (JCSC), vol. 11, no. 5, pp. 459-476, October 2002.
J5. T. Givargis, F. Vahid.
Tuning of Cache Ways and Voltage for Low-Energy Embedded System Platforms.
Springer Journal on Design Automation of Embedded Systems, vol. 7, issue 1-2, pp. 35-51, September 2002.
J4. T. Givargis, F. Vahid, J. Henkel.
Evaluating Power Consumption of Parameterized Cache and Bus Architectures in System-on-a-Chip Designs.
IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 9, no. 4, pp. 500-508, August 2001.
J3. F. Vahid, T. Givargis.
Platform Tuning for Embedded Systems Design.
IEEE Computer, vol. 34, no. 3, pp. 112-114, March 2001.
J2. J. Farrell, T. Givargis, M. Barth.
Real-Time Differential Carrier Phase GPS-Aided INS.
IEEE Transactions on Control Systems Technology (TCST), vol. 8, no. 4, pp. 709-721, July 2000.
J1. J. Farrell, T. Givargis.
Differential GPS Reference Station Algorithm - Design and Analysis.
IEEE Transactions on Control Systems Technology (TCST), vol. 8, no. 3, pp. 519-531, May 2000.
Peer-Reviewed/Archived Conference
C48. B. Miller, F. Vahid, T. Givargis.
MEDS: Mockup Electronic Data Sheets for Automated Testing of Cyber-Physical Systems Using Digital Mockups.
Design Automation and Test in Europe (DATE), to appear.
C47. B. Miller, F. Vahid, T. Givargis.
Digital Mockups for the Testing of a Medical Ventilator.
ACM SIGHIT International Health Informatics Symposium (IHI), pp. 859-862, Florida, January 2012.
C46. B. Miller, F. Vahid, T. Givargis.
Application-Specific Codesign Platform Generation for Digital Mock- ups in Cyber-Physical Systems.
Electronic System Level Synthesis Conference (ESLsyn), pp. 1-6, San Diego, June 2011.
C45. M.A. Ghodrat, T. Givargis.
Efficient Dynamic Voltage/Frequency Scaling through Algorithmic Loop Transformation.
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pp. 203-209, Grenoble, October 2009.
C44. S. Sirowy, F. Vahid, T. Givargis.
Digitally-Bypassed Transducers: Interfacing Digital Mockups to Real-Time Medical Equipment.
International Conference of the IEEE Engineering in Medicine and Biology Society (EMBS), pp. 919-922, Minneapolis, September 2009.
C43. A. Ghosh, T. Givargis.
Source Routing made Practical in Embedded Networks.
International Conference on Computer Communications and Networks (ICCCN), pp. 1-6, San Francisco, August 2009.
C42. A. Ghosh, T. Givargis.
QoS Routing in Wired Sensor Networks with Partial Updates.
World Academy of Science, Engineering and Technology (WASED), pp. 389-393, Oslo, July 2009.
C41. S.K. Mylavarapu, S. Choudhuri, A. Shrivastava, J. Lee, T. Givargis.
FSAF: File System Aware Flash Translation Layer for NAND Flash Memories.
Design Automation and Test in Europe (DATE), pp. 339-344, Dresden, April 2009.
C40. S. Choudhuri, T. Givargis.
FlashBox: A system for logging non-deterministic events in deployed embedded systems.
International ACM Symposium on Applied Computing (SAC), pp. 1676-1682, Honolulu, March 2009.
C39. M.A. Ghodrat, T. Givargis, A. Nicolau.
Control Flow Optimization in Loops using Interval Analysis.
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), pp. 157-166, Atlanta, October 2008. 2008 CASES Best Paper Award.
C38. F. Vahid, T. Givargis.
Timing is Everything - Embedded Systems Demand Teaching of Structured Time-Oriented Programming.
Workshop on Embedded Systems Education (WESE), Atlanta, October 2008.
C37. S. Sirowy, D. Sheldon, T. Givargis, F. Vahid.
Virtual Microcontrollers.
Workshop on Embedded Systems Education (WESE), Atlanta, October 2008.
C36. F. Vahid, T. Givargis.
Highly-Cited Ideas in System Codesign and Synthesis.
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pp. 191-196, Atlanta, October 2008.
C35. S. Choudhuri, T. Givargis.
Deterministic Service Guarantees for NAND Flash using Partial Block Cleaning.
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pp. 19-24, Atlanta, October 2008.
C34. S. Choudhuri, T. Givargis.
Real-Time Access Guarantees for NAND Flash using Partial Block Cleaning.
Workshop on Software Technologies for Future Embedded & Ubiquitous Systems (SEUS), pp. 138-149, Italy, September 2008.
C33. A. Ghosh, T. Givargis.
A Software Architecture for Accessing Data in Sensor Networks.
International Conference on Networked Sensing Systems (INSS), pp. 67-70, Japan, June 2008.
C32. S. Choudhuri, T. Givargis.
Performance Improvement of Block Based NAND Flash Translation Layer.
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pp. 257-262, Salzburg, September 2007.
C31. M.A. Ghodrat, T. Givargis., A. Nicolau.
Short-Circuit Compiler Transformation: Optimizing Conditional Blocks.
Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 504-510, Tokyo, January 2007.
C30. S. Choudhuri, T. Givargis.
System Architecture for Software Peripherals.
Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 56-61, Tokyo, January 2007.
C29. A. Nacul, T. Givargis.
Phantom: A Serializing Compiler for Multitasking Embedded Software.
American Control Conference (ACC), Minneapolis, pp. 1918-1923, Minneapolis, June 2006. 2006 ACC Best Paper Award.
C28. M.A. Ghodrat, T. Givargis, A. Nicolau.
Equivalence Checking of Arithmetic Expressions using Fast Evaluation.
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), pp. 147-156, San Francisco, September 2005.
C27. A. Nacul, T. Givargis.
Lightweight Multitasking Support for Embedded Systems using the Phantom Serializing Compiler.
Design Automation and Test in Europe (DATE), pp. 740-747, Munich, March 2005.
C26. A. Ghosh, T. Givargis.
LORD: A Localized, Reactive and Distributed Protocol for Node Scheduling in Wireless Sensor Networks.
Design Automation and Test in Europe (DATE), pp. 190-195, Munich, March 2005.
C25. A. Mandal, C.V. Lopes, T. Givargis, A. Haghighat, R. Jurdak, P. Baldi.
Beep: 3D Indoor Positioning Using Audible Sound.
IEEE Consumer Communications and Networking Conference (CCNC), pp. 348-353, Las Vegas, January 2005.
C24. A. Nacul, T. Givargis.
Code Partitioning for Synthesis of Embedded Applications with Phantom.
International Conference on Computer-Aided Design (ICCAD), pp. 190-196, San Jose, November 2004.
C23. A. Nacul, T. Givargis.
Dynamic Voltage and Cache Reconfiguration for Low Power.
Design Automation and Test in Europe (DATE), pp. 1376-1377, Paris, February 2004.
C22. M. Buss, T. Givargis, N. Dutt.
Exploring Efficient Operating Points for Voltage Scaled Embedded Processor Cores.
Real-Time Systems Symposium (RTSS), pp. 275-281, Cancun, December 2003.
C21. A. Ghosh, T. Givargis.
Cache Optimization for Embedded Processor Cores: An Analytical Approach.
International Conference on Computer-Aided Design (ICCAD), pp. 342-347, San Jose, November 2003.
C20. T. Givargis.
Improved Indexing for Cache Miss Reduction in Embedded Systems.
Design Automation Conference (DAC), pp. 872-880, Anaheim, June 2003.
C19. A. Ghosh, T. Givargis.
Analytical Design Space Exploration of Caches for Embedded Systems.
Design Automation and Test in Europe (DATE), pp. 650-655, Munich, March 2003.
C18. T. Givargis, D. Eppstein.
Reference Caching Using Unit Distance Redundant Codes for Activity Reduction on Address Buses.
International Workshop on Embedded System Hardware/Software Codesign (ESCODES), San Jose, September 2002.
C17. M. Palesi, T. Givargis.
Multi-Objective Design Space Exploration Using Genetic Algorithms.
International Workshop on Hardware/Software Codesign (CODES), Estes Park, May 2002.
C16. T. Givargis, F. Vahid, J. Henkel.
System-Level Exploration for Pareto-Optimal Configurations in Parameterized Systems-on-a-Chip.
International Conference on Computer-Aided Design (ICCAD), San Jose, November 2001.
C15. T. Givargis, F. Vahid. J. Henkel.
Trace-Driven System-Level Power Evaluation of System-on-a-Chip Peripheral Cores.
Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, January 2001.
C14. G. Stitt, F. Vahid, T. Givargis, R. Lysecky.
A First-Step Towards an Architecture Tuning Methodology.
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), San Jose, November 2000.
C13. T. Givargis, F. Vahid, J. Henkel.
Instruction-Based System-Level Power Evaluation of System-on-a-ChipPeripheral Cores.
International Symposium on System Synthesis (ISSS), Madrid, September 2000.
C12. R. Lysecky, F. Vahid, T. Givargis.
Experiments with the Peripheral Virtual Component Interface.
International Symposium on System Synthesis (ISSS), Madrid, September 2000.
C11. T. Givargis, F. Vahid.
Parameterized System Design.
International Workshop on Hardware/Software Codesign (CODES), San Diego, May 2000.
C10. T. Givargis, F. Vahid, J. Henkel.
Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip Design.
Design Automation and Test in Europe (DATE), Paris, March 2000.
C9. R. Lysecky, F. Vahid, T. Givargis.
Techniques for Reducing Read Latency of Core Bus Wrappers.
Design Automation and Test in Europe (DATE), Paris, March 2000. 2000 DATE Best Paper Award.
C8. T. Givargis, F. Vahid. J. Henkel.
A Hybrid Approach for Core-Based System-Level Power Modeling.
Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, January 2000.
C7. T. Givargis, J. Henkel, F. Vahid.
Interface and Cache Power Exploration for Core-Based Embedded System Design.
International Conference on Computer-Aided Design (ICCAD), San Jose, November 1999.
C6. R. Lysecky, F. Vahid, T. Givargis, R. Patel.
Pre-Fetching for Improved Core Interfacing.
International Symposium on System Synthesis (ISSS), San Jose, November 1999.
C5. J. Farrell, T. Givargis.
Experimental Differential GPS Reference Station Evaluation.
American Control Conference (ACC), San Diego, June 1999.
C4. J. Farrell, T. Givargis. M. Barth.
Differential Carrier Phase GPS-Aided INS for Automotive Applications.
American Control Conference (ACC), San Diego, June 1999.
C3. F. Vahid, T. Givargis.
The Case for a Configure-and-Execute Paradigm.
International Workshop on Hardware/Software Codesign (CODES), Rome, May 1999.
C2. F. Vahid, T. Givargis.
Incorporating Cores into System-Level Specification.
International Symposium on System Synthesis (ISSS), Hsinchu, December 1998.
C1. T. Givargis, F. Vahid.
Interface Exploration for Reduced Power in Core-Based Systems.
International Symposium on System Synthesis (ISSS), Hsinchu, December 1998.
Workshop
W2. A. Nacul, M. Lajolo, T. Givargis.
Interface-Centric Abstraction Level for Rapid Hardware/Software Integration.
Forum on Specification and Design Languages (FDL), Lausanne, September 2005.
W1. A. Haghighat, C. Lopes, T. Givargis, and A. Mandal.
Location-Aware Web System.
Workshop on Building Software for Pervasive Computing at the Object-Oriented Programming, Systems, Languages and Applications (OOPSLA) Conference, Vancouver, October 2004.
Miscellaneous
M1. U. Brinkschulte, M. Cinque, T. Givargis, S. Russo.
Guest Editorial.
Journal of Software, vol. 4, no. 7, pp. 631-633, Septempber 2009.