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Journals

J2. L. Singhal and E. Bozorgzadeh, "Multi-layer Floorplanning for Reconfigurable Designs", in IEE Computers and Digital Techniques (IEE-CDT) Vol. 1, No. 4, pp. 276-294, January 2007.
J1. L. Singhal, E. Bozorgzadeh and D. Eppstein, "Interconnect Criticality Driven Delay Relaxation", in IEEE Transactions on Computer-Aided Designs of Integrated Circuits and Systems (TCAD), Vol. 26, No. 10, pp. 1803-1817, October 2007.

Conferences and Workshops

C8. L. Singhal and E. Bozorgzadeh, "Process Variation Aware System-level Task Allocation using Stochastic Ordering of Delay Distributions", to appear in ACM/IEEE International Conference on Computer-Aided Design (ICCAD), November 2008.
C7. L. Singhal, S. Oh and E. Bozorgzadeh, "Yield Maximization for System-level Task Assignment and Configuration Selection of Configurable Multiprocessors", to appear in ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), October 2008.
C6. L. Singhal, S. Oh and E. Bozorgzadeh, "Statistical Power Profile Correlation for Realistic Thermal Estimation", IEEE Asia and South Pacific Design Automation Conference (ASPDAC), Seoul, Korea, Jan 2008 (pdf).
C5. L. Singhal and E. Bozorgzadeh, "Novel multi-layer floorplanning for Heterogeneous FPGA", IEEE Field Programmable Logic and Applications (FPL), Amsterdam, Netherlands, August 2007 (pdf).
C4. L. Singhal and E. Bozorgzadeh, "Heteterogeneous Floorplanner for FPGA", IEEE Field Programmable Custom Computing Symposium (FCCM), Napa Valley, California, April 2007 (pdf).
C3. L. Singhal and E. Bozorgzadeh, "Multi-layer Floorplanning on a Sequence of Reconfigurable Designs", IEEE International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, 2006 (Best Paper Award) (pdf).
C2. L. Singhal and E. Bozorgzadeh, "Physically-aware Exploitation of Component Reuse in a Partially Reconfigurable Architecture", in IEEE Reconfigurable Architectures Workshop (RAW), Rhodes, Greece, April 2006 (pdf).
C1. L. Singhal and E. Bozorgzadeh, "Fast Timing Closure Through Interconnect Criticality Driven Delay Relaxation", in ACM/IEEE International Conference on Computer-Aided Design (ICCAD), November 2005 (pdf).

This page was last updated on 06/26/08.