What can you do with the NISC Technology toolset?
- C-to-RTL synthesis: You can use the tools as a free C-to-RTL (i.e. C to Verilog) synthesis tool. With the NISC toolset, you can generate a customized RTL for your C code and then get the corresponding architecture description (GNR) and synthesizable Verilog code as output. In contrast to standard high-level synthesis (HLS) tools, after generating the architecture, you can go back, edit the generated architecture, and use it as the input of the NISC toolset again! This way, you can target specific improvement!
You can also accurately control the area, clock-frequency, power, layout routability, etc. (all of which are left to guesswork and trial-and-error in standard HLS tools!)
- Embedded custom-processor design: You can use the tools to design embedded custom-processors. You can specify the datapath and the custom-functional units and then (without worrying about designing an instruction decoder, instruction binary, etc) use the NISC toolset to compile your C code on your custom processor.
- Design space exploration: You can try any "What-if" scenario with the NISC toolset. Change your application C code or the architecture structure and see the results immediately! Explore the effects of adding/removing components, connections, or registers at different places in your datapath and see how it affects clock-frequency, number of cycles, power, area, energy, routability, etc.
Why use NISC?
No-Instruction-Set-Computer (NISC) Technology is the next generation of tools for design synthesis.
With NISC Technology, you can simultaneously gain higher productivity and better quality of results. Other techniques only offer one of these benefits.
Two popular approaches for designing digital systems:
- Low-level design at Register Transfer Level (RTL).
- Can lead to efficient IPs but the development time and cost is very high.
- High-Level-Synthesis (HLS)
goal: improve productivity
- Automatically converts high-level description of the IP (e.g. written in C language) to RTL
- Designer has little control over the quality of the generated RTL in terms of clock frequency,
area, manufacturability, power, etc.
- Result quality is typically bad.
- High-level design using general-purpose or custom processors.
- Development time and cost is much lower, but the efficiency and implementation quality is also much lower.
- Application-Specific-Instruction-Processors (ASIP) goal: improve quality
- Adds application-specific instructions
to the processor
- Finding suitable custom instructions and adding them to the toolset (compiler, simulator, etc.) is a very challenging task.
- Because of their instruction-set, processors (including ASIPs) impose a minimum overhead in terms of area, power, and performance.
- The processor-based implementation may become more appealing only when the IP design complexity is above a certain level (relatively very high).
- Not suitable if you want to run a few algorithms or design a hardware block.
Switching from RTL design to ASIP (and vice versa) requires changing the entire toolset and skill-set. So, you can only explore a very small domain. None of these approaches are suitable for designs with medium complexity!
With NISC Technology we address both the design productivity and quality. The main idea is to automatically compile a given application on a given datapath.
NISC technology offers a new approach for design of custom processor and IPs.
It removes instructions to enable faster execution and better customization.
Without instructions, NISC compiler has full control of all the components and connections in the datapath which enables it to
achieve better resource utilization. One NISC toolset is sufficient for all possible datapaths.
Therefore, NISC is the universal processing element for all IP designs.
NISC Technology Benefits
- High productivity gain through RTL code generation
- Better quality of the results
- Aggressive power, performance and area optimization
- Seamless custom unit integration
- Optional manual optimizations
- Easy system integration
- Providing ultimate reuse, reprogrammability and reconfigurability
- Facilitating design for manufacturability: layout available before compilation
- Fast design space exploration of "what if" scenarios
- One toolset for all IPs
- Excellent market penetration through customization
Who can use NISC?
NISC Technology can be used for many different purposes. You may want to use NISC if you are:
- A digital designer looking to explore different design alternatives for implementing an algorithm.
- A software developer interested in performance evaluation of an algorithm on a specific architecture.
- A system developer interested in generating IP blocks and improving performance of different parts of an application.
- an architecture researcher/developer interested in evaluating the effect of different architectural techniques on an actual implementation.
- An FPGA user looking for an easy way of programming an FPGA.
- An ASIC designer interested in quickly prototyping on FPGA.
- A co-processor or accelerator developer.
- An educator interested in showing the students how programs actually execute in hardware.
- An EDA researcher interested in different design aspects such as application code modification/transformation, architecture description, physical-aware design, ...
- A student or hobbyist looking to do really cool stuff!!!
- Even a researcher doing verification (see this!)
- Read more:
- NISC Features
- NISC Toolset FAQ
- NISC Introduction
- NISC in System
- Related publications
- Example designs
- Join the NISC user forum
- Download & install free tools (for custom IP design, and C to Verilog conversion)
- Try the tools online (for custom IP design, and C to Verilog conversion)