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Publications:1,2


Book Chapters:

  1. B. Gorjiara, M. Reshadi, D. Gajski, "Chapter 13: GNR: A Formal Language for Specification, Compilation, and Synthesis of Custom Embedded Processors", P. Mishra, N. Dutt, Processor Description Languages: Applications and Methodologies, Morgan Kaufmann, ISBN: 978-0-12-374287-2, June 2008. (Elsevier) (amazon)

  2. B. Gorjiara, M. Reshadi, D. Gajski, "Chapter 2 Low-Power Design with NISC Technology", J. Henkel, S. Parameswaran, Designing Embedded Processors: A Low Power Perspective, Springer, ISBN: 978-1-4020-5868-4, April 2007. (springer) (amazon)

Journal Papers:

  1. M. Reshadi, P. Mishra, N. Dutt, "Hybrid Compiled Simulation: An Efficient Technique for Instruction-Set Architecture Simulation", ACM Transactions on Embedded Computing Systems (TECS), Volume 8, Issue 3, pages 20:1-20:27, April 2009. (pdf) (acm)

  2. B. Gorjiara, M. Reshadi, D. Gajski, "Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs", ACM Transactions on Reconfigurable Technology and Systems, Volume 1, Issue 2, pages 11:1-11:21, June 2008. (pdf) (acm)

  3. M. Reshadi, B. Gorjiara, N. Dutt, "Generic Processor Modeling for Automatically Generating Very Fast Cycle-Accurate Simulators", IEEE Transactions on Computer Aided Design (TCAD), Volume 25, Issue 12, pages 2904-2918, December 2006. (pdf) (ieee)

  4. M. Reshadi, P. Mishra, N. Dutt, "A Retargetable Framework for Instruction-Set Architecture Simulation", ACM Transactions on Embedded Computing Systems (TECS), Volume 5, Issue 2, pages 431-452, May 2006. (pdf) (acm)

Conference Papers:

  1. M. Reshadi, B. Gorjiara, D. Gajski, "C-Based Design Flow: A Case Study on G.729A for Voice over Internet Protocol (VoIP)", Design Automation Conference (DAC), June 2008. (pdf)

  2. M. Reshadi, D. Gajski, "Interrupt and Low-level Programming Support for Expanding the Application Domain of Statically-scheduled Horizontally-microcoded Architectures in Embedded Systems", Design Automation and Test in Europe (DATE), April 2007. (pdf) (ieee) (acm)

  3. B. Gorjiara, M. Reshadi, P. Chandraiah, D. Gajski, "Generic Netlist Representation for System and PE Level Design Exploration", International Symposium on Hardware/Software Codesign and System Synthesis (CODES+ISSS), October 2006. (pdf) (acm)

  4. B. Gorjiara, M. Reshadi, D. Gajski, "Generic Architecture Description for Retargetable Compilation and Synthesis of Application-Specific Pipelined IPs", International Conference on Computer Design (ICCD), October 2006. (pdf)

  5. J. Trajkovic, M. Reshadi, B. Gorjiara, D. Gajski, "A Graph Based Algorithm for Data Path Optimization in Custom Processors", 9th Euromicro Conference on Digital System Design, September 2006. (pdf)

  6. B. Gorjiara, M. Reshadi, D. Gajski, "Designing a Custom Architecture for DCT Using NISC Technology", Asia and South Pacific Design Automation Conference (ASPDAC), Design Contest, January 2006. (pdf) Download DCTs code

  7. M. Reshadi, B. Gorjiara, D. Gajski, "Utilizing Horizontal and Vertical Parallelism Using a No-Instruction-Set Compiler and Custom Datapaths", International Conference on Computer Design (ICCD), pages 69-76, October 2005. (pdf) (ieee) (acm)

  8. M. Reshadi, D. Gajski, "A Cycle-Accurate Compilation Algorithm for Custom Pipelined Datapaths", International Symposium on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pages 21-26, September 2005. (pdf) (acm)

  9. M. Reshadi, P. Mishra, "Memory Access Optimizations in Instruction-Set Simulators", International Symposium on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pages 237-242, September 2005. (pdf) (slides) (acm)

  10. M. Reshadi, N. Dutt, "Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation", Design Automation and Test in Europe (DATE), pages 786-791, March 2005. (pdf) (ieee) (acm)

  11. B. Gorjiara, P. Chou, N. Bagherzadeh, D. Jensen, M. Reshadi, "Fast and Efficient Voltage Scheduling by Evolutionary Slack Distribution", Asia and South Pacific Design Automation Conference (ASPDAC), pages 659-662, January 2004. (pdf) (ieee) (acm)

  12. M. Reshadi, N. Dutt, "Reducing Compilation Time Overhead in Compiled Simulators", International Conference on Computer Design (ICCD), pages 151-153, October 2003. (pdf) (slides) (ieee) (acm)

  13. M. Reshadi, N. Bansal, P. Mishra, N. Dutt, "An Efficient Retargetable Framework for Instruction-Set Simulation", International Symposium on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pages 13-18, October 2003. (pdf) (slides) (acm) (ieee)
    Best Paper Award

  14. M. Reshadi, P. Mishra, N. Dutt, "Instruction Set Compiled Simulation: A Technique for Fast and Flexible Instruction Set Simulation", Design Automation Conference (DAC), pages 758-763, June 2003. (pdf) (slides) (acm) (ieee)

  15. S. Gupta, M. Reshadi, N. Savoiu, N. Dutt, R. Guota, A. Nicolau, "Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis", International Symposium on System Synthesis (ISSS), pages 261-266, October 2002. (pdf) (acm) (ieee)

  16. D. Rahmati, A. Salimi, M. Reshadi, Z. Navabi, "Handling Complex VHDL Semantics with an OO Intermediate Format", IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), pages 1273-1278, May 2001. (pdf) (ieee)

  17. B. Gorjiara, M. Reshadi, M. Fakhraie, "GeReDiF: Using XML as a Structured Data Format in Grid Applications", IEEE International Symposium on Cluster Computing and the Grid (CCGrid), May 2001. (poster-pdf) (pdf)

  18. M. Reshadi, B. Gorjiara, Z. Navabi, "Portability and Security, All in CHIRE File System", Hardware Description Languages Conference (HDLCon), February 2001. (pdf)

  19. M. Reshadi, A. Gharehbaghi, Z. Navabi, "AIRE/CE: A Revision Towards CAD Tool Integration", International Conference on Microelectronics (ICM), pages 277-280, November 2000. (pdf) (ieee)

  20. M. Reshadi, B. Gorjiara, Z. Navabi, "HDML: Compiled VHDL in XML", VHDL International Users Forum (VIUF), pages 69-74, October 2000. (pdf) (ieee) (acm)

  21. M. Reshadi, A. Gharehbaghi, Z. Navabi, "Intermediate Format Standardization: Ambiguities, Deficiencies, Portability issues, Documentation and Improvements", Hardware Description Languages Conference (HDLCon), March 2000. (pdf)

Technical Reports:

  1. B. Gorjiara, M. Reshadi, D. Gajski, "NISC Communication Interface", Center for Embedded Computer Systems, TR 06-05, March 2006. (pdf)

  2. M. Reshadi, B. Gorjiara, D. Gajski, "NISC Technology and Preliminary Results", Center for Embedded Computer Systems, TR 05-11, August 2005. (pdf)

  3. M. Reshadi, D. Gajski, "NISC Modeling and Compilation", Center for Embedded Computer Systems, TR 04-33, December 2004. (pdf)

  4. M. Reshadi, D. Gajski, "NISC Application and Advantages", Center for Embedded Computer Systems, TR 04-12, May 2004. (pdf)

  5. M. Reshadi, D. Gajski, "NISC Modeling and Simulation", Center for Embedded Computer Systems, TR 04-08, March 2004. (pdf)

  6. M. Reshadi, N. Dutt, "RCPN: Reduced Colored Petri Nets for Efficient Modeling of Pipelined Processors and Generation of Very Fast Cycle-Accurate Simulators", Center for Embedded Computer Systems, TR 03-48, December 2003.

  7. M. Reshadi, P. Mishra, N. Bansal, N. Dutt, "ReXsim: A Retargetable Framework for Instruction-Set Architecture Simulation", Center for Embedded Computer Systems, TR 03-05, February 2003. (pdf)

  8. B. Gorjiara, F. Kuester, P. Chou, M. Reshadi, "GX-GUI: A General Extensible Technique for 2-D Interaction with VR Applications", Center for Embedded Computer Systems, TR 03-46, January 2003.

Thesis:

  1. M. Reshadi, "No-Instruction-Set-Computer (NISC) Technology Modeling and Compilation", Ph.D. Dissertation, School of Information and Computer Science, University of California, Irvine, September 2007. (pdf) (doc)

1 I always try to follow this lesson.
2 Disclaimer: Some of the papers in this page are covered by copyright. Permission to make digital/hard copy of all or part of this paper for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage. To copy otherwise, to republish, to post on servers, or to redistribute to lists requires prior specific permission from the corresponding publishers.