Books

Books

B1	D. Gajski, N.D. Dutt, A. Wu and S. Lin, “High Level Synthesis: Introduction to Chip and System Design,” Kluwer Academic Publishers, Norwell, MA, 1992. Second Printing, Kluwer Academic Publishers, 1993.
B2	P.R. Panda, N.D. Dutt and A. Nicolau, “Memory Issues in Embedded Systems-on-Chip: Optimizations and Exploration,” Kluwer Academic Publishers, Norwell, MA, 1998.
B3	P. Grun, N.D. Dutt and A. Nicolau, “Memory Architecture Exploration for Programmable Embedded Systems,” Kluwer Academic Publishers, Norwell, MA, 2003, ISBN: 1402073240.
B4	S. Gupta, N.D. Dutt, R. Gupta and A. Nicolau, “SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits,” Kluwer Academic Publishers, Norwell, MA, 2004.
B5	P. Mishra, N.D. Dutt, "Functional Validation of Programmable Embedded Architectures: A Top-Down Approach", Springer-Verlag, 2005

Book Chapters

BC1	N.D. Dutt and D.D. Gajski, “EXEL: A Language for Interactive Behavioral Synthesis,” Computer Hardware Description Languages and Their Applications, J.A. Darringer and F.J. Rammig, Editors, North-Holland 1990.
BC2	N.D. Dutt, J. Cho and T. Hadley, “A User Interface for Behavioral VHDL Modeling,” Computer Hardware Description Languages and Their Applications, D. Borrione and R. Waxman, Editors, North-Holland 1992.
BC3	A. Capitanio, A. Nicolau and N.D. Dutt, “A Hypergraph-Based Model for Port Allocation on VLIW Architectures,” Massive Parallelism: Hardware, Software and Applications, M. Mango Furnari, Editor, World Scientific Press 1994, pp. 215-230.
BC4	P. Conradi and N.D. Dutt, “A Compound Information Model for High-Level Synthesis,” Electronic Design Automation Frameworks, F. Rammig and F. Wagner, Editors, Chapman 1995, pp. 189-198.
BC5	S. Novack, A. Nicolau and N.D. Dutt, “A Unified Code Generation Approach using Mutation Scheduling,” Code Generation for Embedded Processors, G. Goossens and P. Marwedel, Editors, Kluwer Academic Publishers 1995, pp. 203-218.
BC6	C. Ramachandran, P.K. Jha, F. Kurdahi and N.D. Dutt, “Towards Better Accounting of Physical Design Effects in High Level Synthesis,” A. Mignotte and G. Saucier, Editors, Chapman and Hall 1995, pp. 252-258.
BC7	P. Panda, H. Nakamura, N.D. Dutt and A. Nicolau, “Improving Cache Performance through Tiling and Data Alignment,” in Solving Irregularly Structured Problems in Parallel, G. Bilardi, A. Ferreira and J. Rolim, Editors, Springer-Verlag series Lecture Notes in Computer Science (LNCS) 1253, 1997, pp. 167-185.
BC8	D. Kolson, A. Nicolau and N.D. Dutt, “Copy Elimination for Parallelizing Compilers,” in Languages and Compilers for Parallel Computing, S. Chatterjee, J.F. Prins, L. Carter, J. Ferrante, Z. Li, D. Sehr, P.-C. Yew, Editors, Springer-Verlag series Lecture Notes in Computer Science (LNCS) Volume 1656,1999, pp. 275-289.
BC9	A Halambi, N.D. Dutt and A. Nicolau, " Customizing Software Toolkits for Embedded System-On-Chip," in Architecture and Design of Distributed Embedded Systems, Bernd Kleinjohann, Editor, Kluwer Academic Publishers, 2001, pp. 87-97.
BC10	P. Grun , N. D. Dutt , A. Nicolau, “Aggressive Memory-Aware Compilation,” in Intelligent Memory Systems, F.T. Chong, C. Kozyrakis, M. Oskin, Editors, Lecture Notes in Computer Science Publisher: Springer-Verlag Heidelberg ISSN: 0302-9743, Volume 2107 / 2001, pp. 147-151.
BC11	P. Mishra and N.D. Dutt, "Modeling and Verification of Pipelined Embedded Processors in the Presence of Hazards and Exceptions," in Design and Analysis of Distributed Embedded Systems, Bernd Kleinjohann et al., Editors, Kluwer Academic Publishers, 2002, pp. 81-90.
BC12	Preeti Ranjan Panda, Nikil D. Dutt, “Memory Architectures for Embedded Systems-on-Chip,” in High Performance Computing, S. Sahni, V.K. Prasanna, U. Shukla, Editors, Lecture Notes in Computer Science ( LNCS ) Vol. 2552, Springer-Verlag, 2002, pp. 647-662.
BC13	M. Kandemir and N.D. Dutt, “Memory Systems and Compiler Support for MPSOC Architectures,” in Multiprocessor Systems-on-Chip, edited by A. Jerraya and W. Wolf, Morgan Kaufmann Publishers, 2004, pp. 251-281.
BC14	R. Cornea, N.D. Dutt, R. Gupta, S. Mohapatra, A. Nicolau, C. Pereira, S. Shukla and N. Venkatasubramanian, " ServiceFORGE: A Software Architecture for Power and Quality Aware Services ", International Workshop on Service-Based Software Engineering (collocated with Formal Methods in Europe – FME), LNCS XXX.
BC15	A. Gordon-Ross, C. Zhang, F. Vahid and N.D. Dutt, “Tuning Caches to Applications for Low-Energy Embedded Systems” in Ultra Low-Power Electronics and Design, Enrico Macii, Editor, Kluwer Academic Publishers, 2004, pp. 103-122.
BC16	S. Mohapatra, N. Venkatasubramanian, N.D. Dutt, C. Pereira, and R. Gupta, “Energy-Aware Adaptations for End-to-end Video Streaming to Mobile Handheld Devices,” in Ultra Low-Power Electronics and Design, Enrico Macii, Editor, Kluwer Academic Publishers, 2004, pp. 255-273.