Operators
|
| Operator |
---- used in ----> |
Expression |
The logical operators are predefined for bit, boolean,
bit_vector, linear arrays of boolean, std_logic and
std_logic_vector types. They return a value of the same type:
and, or, nand, nor, xor, not
|
|
The equality and inequality operators are
predefined for all types, and they return a boolean value:
= -- equal to
/= -- not equal to
|
|
The other relational operators are predefined for all scalar types,
and all one-dimensional array types. They also return a boolean value:
< -- less than
> -- greater than
<= -- less than or equal to
>= -- greater than or equal to
|
For arrays of different lengthsm the predefined relational operators
align the left-hand elements and compare corresponding positions. This
can lead to unexpected results:
constant ARR1 :bit_vector := "0011";
constant ARR2 :bit_vector := "01";
-- (ARR1 < ARR2) will return true |
The & operator is used to concatenate (join) arrays, or join
new elements to an array:
Z_BUS(1 downto 0) <= '0' & B_BIT;
BYTE <= A_BUS & B_BUS;
|
Add, subtract, multiply and divide are defined for integer and real.
Both operands must be the same type, and the result is also of the same
type:
signal INT1, INT2: integer := 0;
signal REAL1, REAL2: real := 6.7;
...
INT1 <= INT1 + 3;
REAL1 <= REAL2 - 2.2;
INT2 <= INT1 * REAL1; --illegal
INT2 <= INT1 * INTEGER(REAL1);
REAL2 <= REAL1 / 42.3;
|
For physical types (e.g.time), assignments must be dimensionally
consistant:
variable TIME1,TIME2: time;
...
TIME1 := TIME2 * 2.5;
TIME1 := TIME2 / 4;
TIME1 := 3.6 ns + TIME2;
TIME1 := TIME2 * 6.67 ns; --illegal
|
| Other numeric operators are exponentiation (**), absolute
value (abs), modulus (mod), and remainder (rem).
|
Most predefined operators are synthesisable, providing they are used
with types accepted by the synthesis tool. See also
type declarations and
overloading
The following are not usually synthesisable, except as part of a
constant expression: exponentiation (**), division by other than 2, mod,
rem.
xnor has been added to the logical operators in VHDL-94. New
shift and rotate operators are defined for one-dimensional
arrays of bit or boolean:
sll -- shift left logical
srl -- shift right logical
sla -- shift left arithmetic
sra -- shift right arithmetic
rol -- rotate left
ror -- rotate right