Education

09/2005 to 06/2012: Ph.D., Information and Computer Science, University of California, Irvine (Emphasis in Embedded Systems Security and Reliability)
09/2001 to 06/2005: B.S., Information and Computer Science, University of California, Irvine

Work and Research Experience

06/2010 to 01/2012: Autonomic Storage Management - Almaden Research Center (ARC), IBM, San Jose, CA - Developed iCostale, an adaptive real-time compression engine for optimized data storage on the cloud
06/2009 to 06/2010: Autonomic Storage Management - Almaden Research Center (ARC), IBM, San Jose, CA - Worked on management software for large scale GPFS based clusters
06/2008 to 09/2008: Autonomic Storage Management - Almaden Research Center (ARC), IBM, San Jose, CA - Worked on the scalability of discovery and monitoring of enterprise environments for the IBM PERCS project
06/2007 to 09/2007: Autonomic Storage Management - Almaden Research Center (ARC), IBM, San Jose, CA - Worked on performance simulation of enterprise storage systems
06/2006 to 10/2006: Advanced Storage Systems - Almaden Research Center (ARC), IBM, San Jose, CA - Worked on sequential prefetching for large scale storage systems
06/2005 to 10/2005: Design Validation Engineer - Intel Irvine, CA - Development of Linux Applications in Perl/Tk and Shell scripting as well as validation with Verisity/Specman Elite
06/2004 to 06/2005: Software Engineer - IBM Tucson, AZ - Development of Linux Applications in CGI/Perl, Shell scripting, Tcl/Tk Java, and C/C++
06/2002 to 09/2004: Webmaster Advanced Computer Architecture Group and the MorphoSys Research Group, EECS Department, University of California, Irvine, CA
06/2005 to Present: Graduate Student - Applications and Compilers for Embedded Systems (ACES) Center for Embedded Computer Systems, UC-Irvine - Software/Hardware Co-design
01/2005 to 06/2005: Undergraduate Researcher - UC-Irvine - Development of a high level system model of a JPEG2000 encoder in SystemC
06/2004 to 09/2004: Undergraduate Researcher - UC-Irvine - Developed an assembler/dis-assembler for the MaRS Reconfigurable Architecture
09/2003 to 04/2004: Undergraduate Researcher - UC-Irvine - Algorithm Mapping on the MorphoSys Reconfigurable Architecture with focus on the MPEG-4 and H.263 Video Coding Standards
06/2002 to 06/2003: Undergraduate Researcher - UC-Irvine - Algorithm Mapping on the MorphoSys Reconfigurable Architecture - Research Focused on Automatic Target Recognition

Skills

Languages/Libraries: C/C++/POSIX, Java, Perl/CGI/Tk, Shell Scripting, Tcl/Tk, Assembly (x86, MIPS, MorphoSys and MaRS), SystemC, Specman Elite, Verilog, all flavors of HTML, XML.
Platforms: MacOS, Unix/Linux, Windows
Tools: Visual Studio/.NET, Verisity, Netbeans, Eclipse IDE, Kdevelop IDE, IBM Rational

Honors and Awards

ACM/SIGDA Ph.D. Forum Travel Award Recipient, 2011
UCI President's Dissertation Year Fellowship Recipient, 2010
Trusted Infrastructure Workshop Scholarship Recipient 2009, 2010
NSF/UCI SFS Fellow, 2008
Design and Automation Conference (DAC) Young Student Award, 2005
CAMP/McNair Statewide Student Researcher of the Year Award, 2005
Eugene Cota-Robles (ECR) Fellowship Award Recipient, 2005 - 2008
Intel/GEM Fellowship Award Recipient, 2005
3rd Place Award for Poster Presentations - MAES 2004 International Symposium and Career Fair
CAMP/McNair Mentor of the Year, 2004
CAMP/Toshiba Electronics Scholarship Recipient, 2003
Ronald E. McNair Scholar 2002 - Present
CAMP Summer Scholar 2002, 2003

Undergraduate Presentations and Posters

Poster Presentation, Abstract: Fast Motion Estimation Algorithm Mapping on a Reconfigurable Architecture - MAES International
Symposium and Career Fair 2004, Austin, TX
Poster Presentation, Abstract: Fast Motion Estimation Algorithm Mapping on a Reconfigurable Architecture - SACNAS National Conference 2004, Austin, TX
Oral Presentation, Abstract: Fast Motion Estimation Algorithm Mapping on a Reconfigurable Architecture - CAMP Statewide Symposium 2004, Irvine, CA
Poster Presentation, Abstract: A Fast and Innovative Approach Towards an Automatic Target Recognition System Implementation on a Reconfigurable Architecture - SACNAS National Conference 2003, Albuquerque, NM
Oral Presentation, Abstract: A Fast and Innovative Approach Towards an Automatic Target Recognition System Implementation on a Reconfigurable Architecture - McNair Symposium 2003, Berkeley, CA

External Presentations and Seminars Given

Presentation: Inter-kernel Data Reuse and Pipelining on Chip-Multiprocessors for Multimedia Applications - Air Force Research Labs, Rome, NY
Seminar: Special Topics on Embedded System Security, Spring Quarter, 2009

Reviewer

Conferences:

• IEEE Symposium on Application Specific Processors (SASP)
• International Conference on Embedded Software (EMSOFT)
• Design Automation and Test in Europe (DATE)
• IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTImedia)
• IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)
• International Workshop on Software and Compilers for Embedded Systems (SCOPES)
• IEEE International Symposium on a World of Wireless, Mobile and Multimedia Networks (WoWMoM)
• IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
• IEEE Conference on Green Computing (ICCG)
• IEEE International Conference on VLSI Design (ICVD)
• International Symposium on VLSI Design, Automation & Test (VLSI-DAT)
• ACM/IEEE International Conference on Cyber-Physical Systems (ICCPS)

Journals:

• IEEE Transactions on Very Large Scale Integration Systems
• ACM Transactions on Embedded Computing Systems
• IEEE Design and Test of Computers
• ACM Transactions on Computer Aided Design
• ACM Transactions on Design Automation of Electronic Systems

Magazines:

• IEEE Communications Magazine

Books:

• "On-Chip Communication Architectures", Morgan Kauffman, ISBN 978-0-12-373892-9

Publications

Conferences:

• L. Bathen, N. Dutt, "HaVOC: A Hybrid-Memory-aware Virtualization Layer for On-Chip Distributed ScratchPad and Non-Volatile Memories", 49th Design Automation Conference (DAC), 2012
• Y. Wang, L. Bathen, N. Dutt, Z. Shao, "Meta-Cure: A Reliability Enhancement Strategy for Metadata in NAND Flash Memory Storage Systems", 49th Design Automation Conference (DAC), 2012
• L. Bathen, N. Dutt, P. Gupta, A. Nicolau, "VaMV: Variability-aware Memory Virtualization", Design, Test and Automation in Europe (DATE) Conference, 2012 (BEST IP CANDIDATE)
• Y. Wang, L. Bathen, N. Dutt, Z. Shao, "3D-FlashMap: A Physical-Location-Aware Block Mapping Strategy for 3D NAND Flash Memory", Design, Test and Automation in Europe (DATE) Conference, 2012
• L. Bathen, N. Dutt, "Exploiting Unreliable Embedded Memories", International Symposium on Electronic System Design (ISED), 2011
• D. Hong, L. Bathen, S-S. Lim, N. Dutt, "DynaPoMP: Dynamic Policy-driven Memory Protection for Embedded Systems", 6th Workshop on Embedded Systems Security (WESS 2011), 2011
• L. Bathen, D. Shin, S-S. Lim, N. Dutt, "SPMVisor: Dynamic ScratchPad Memory Virtualization for Secure, Low Power and High Performance, Distributed On-Chip Memories", International Conference on Hardware - Software Codesign and System Synthesis, (CODES+ISSS), 201 1(BEST PAPER CANDIDATE)
• L. Bathen, S. Agarwala, D. Jadav, "iCostale: Adaptive Cost Optimization for Storage Clouds", to appear, IEEE International Conference on Cloud Computing (CLOUD), July 2011
• L. Bathen, N. Dutt, "TrustGeM: Dynamic Trusted Environment Generation for Chip-Multiprocessors", to appear, IEEE Int. Symp. in Hardware-Oriented Trust and Security (HOST), June 2011
• L. Bathen, N. Dutt, "E-RoC: Embedded Raid-on-Chips for Low Power Embedded Memory Systems", Design, Test and Automation in Europe (DATE) Conference 2011
• L. Bathen, N. Dutt, "PoliMakE: A Policy Making Engine for Secure Embedded Software Execution on Chip-Multiprocessors", Workshop on Embedded Systems Security, 2010
• T. Takenaka, L. Bathen, Y. Ahn, N. Dutt, "MASHPIPE: Memory-Aware Synthesis of Hardware Models exploiting Macro-PIPElining", under review, ESTIMEDIA '10
• L. Bathen et al., "Inter and Intra Reuse Analysis Driven Pipelining on Chip-Multiprocessors," 10th International Symposium on VLSI Design, Automation & Test (VLSI-DAT '10), Hsinchu, Taiwan, Apr 2010
• S. Agarwala, D. Jadav, R. Routray, L. Bathen, "Configuration Discovery and Monitoring Middleware for Enterprise Datacenters," 12th IEEE/IFIP Network Operations and Management Symposium (NOMS 2010), April 2010 at the Osaka International Convention Center, Osaka, Japan
• L. Bathen et al., "A Methodology for Power-aware Pipelining via High-Level Performance Model Evaluations," 10th International Workshop on Microprocessor Test and Verification (MTV '09), Austin, TX, Dec 2009
• L. Bathen et al., "Inter-kernel Data Reuse and Pipelining on Chip-Multiprocessors for Multimedia Applications," 6th IEEE W. on EmbeddedSystems for Real-time Multimedia (ESTImedia '09), Grenoble, France, Oct 2009
• S. Agarwala, D. Jadav, R. Routray, L. Bathen, "ParaDisE: Parallel Discovery Engine for Enterprise Datacenters," 6th International Conference on Autonomic Computing and Communications (ICAC 2009), Barcelona, Spain, June 2009
• L. Bathen, S. Pasricha, N. Dutt, "A Framework for Memory-aware Multimedia Application Mapping on Chip-Multiprocessors," 6th IEEE W. on EmbeddedSystems for Real-time Multimedia (ESTImedia '08), Atlanta, GA, Oct 2008
• B. Gill, L. Bathen, "AMP: Adaptive Multi-stream Prefetching in a Shared Cache," 5th USENIX Conference on File and Storage Technologies (FAST'07), San Jose, CA, Feb 2007.
• G. Madl, S. Pasricha, Q. Zhu, L. Bathen, N. Dutt, "Formal Performance Evaluation of AMBA-based System-on-Chip Designs," 6th Annual ACM Conference on Embedded Software (EMSOFT 2006), Seoul, Korea, October 2006

Journals:

• L. Bathen, D. Shin, S-S. Lim, N. Dutt, "vSPMs: Virtual ScratchPad Memories - Virtualizing On-Chip Distributed ScratchPad Memories for Low Power and Secure Application Execution," under review, Springer Journal on Design Automation for Embedded Systems - Special Issue: Best of CODES+ISSS 2011, Invited
• L. Bathen, N. Dutt, "Embedded RAIDs-on-Chip for Bus-based Chip-Multiprocessors," under review, IEEE Transactions on Embedded Computing Systems (TECS)
• L. Bathen, N. Dutt, "SPMCloud: Towards the Single-Chip Embedded ScratchPad Memory-based Storage Cloud," under review, ACM Transactions on Design Automation of Electronic Systems (TODAES)
• L. Bathen et al., "MultiMaKe: Chip-Multiprocessor Memory-aware Kernel Pipelining," to appear, IEEE Transactions on Embedded Computing Systems (TECS)
• B. Gill, L. Bathen, "Optimal Multi-stream Sequential Prefetching in a Shared Cache," ACM Transactions on Storage (TOS), Volume 3, Issue 3 (Oct 2007)
• G. Madl, S. Pasricha, Q. Zhu, L. Bathen and N. Dutt, "Combining Transaction-level Simulations and Model Checking for MPSoC Verification and Performance Evaluation", under review, IEEE Transactions on Embedded Computing Systems (TECS)

Technical Reports:

• L. Bathen, N. Dutt, P. Gupta, A. Nicolau, "A Case for an Adaptive and Opportunistic Variability-aware Memory Virtualization Layer", UCI Center for Embedded Computer Systems TR #11-09, Oct. 2011
• L. Bathen, D. Shin, S-S. Lim, N. Dutt, "Towards Distributed On-Chip Memory Virtualization", UCI Center for Embedded Computer Systems TR #11-08, Aug. 2011
• L. Bathen, N. Dutt, "Towards Embedded RAIDs-on-Chip", UCI Center for Embedded Computer Systems TR #10-12, Nov. 2010

Invited Talks:

• Inter-kernel Data Reuse and Pipelining on Chip-Multiprocessors for Multimedia Applications - Air Force Research Labs, Rome, NY 01/2010
• SeReVraL: Secure and Reliable Virtualization Layer for On-Chip Distributed Memories - Space and Naval Warfare Systems Command (Navy), San Diego, CA 04/2011
• SeReVraL: Secure and Reliable Virtualization Layer for On-Chip Distributed Memories – Naval Postgraduate School, Monterey, CA 04/2011
• SeReVraL: Secure and Reliable Virtualization Layer for On-Chip Distributed Memories – Lawrence Livermore National Labs, Livermore, CA 05/2011
• SeReVraL: Secure and Reliable Virtualization Layer for On-Chip Distributed Memories – MIT Lincoln Labs, Lexington, MA 07/2011
• Exploiting Errors for Low Power On-Chip Memories, Luis Bathen and Nikil Dutt, ETMEC 2011 - 1st Workshop on Energy and Thermal Management of Embedded Computing (ETMEC)
• Virtualizing on-chip distributed memories for low power, error-resilient, secure Systems-on-Chip, Luis Bathen and Nikil Dutt, Memory Architecture and Organization Workshop (MeAOW) 2011, Taipei, Taiwan

Posters:

• L. Bathen, D. Shin, S-S. Lim, N. Dutt, "SPMVisor: Dynamic ScratchPad Memory Virtualization for Secure, Low Power and High Performance, Distributed On-Chip Memories," CODESS+ISSS, October 2011
• L. Bathen, N. Dutt, "SeReVraL: Secure and Reliable Virtualization Layer for On-Chip Distributed Memories," ACM/SIGDA Ph.D. Forum at DAC, June 2011
• L. Bathen, N. Dutt, "SeReVraL: Secure and Reliable Virtualization Layer for On-Chip Distributed Memories," First CRA-W/CDC Workshop on Diversity in Design Automation and Test:Putting D(iversity) in Design Automation and Test (WD2AT), to present, Pittsburgh, PA, May 2011
• L. Bathen, N. Dutt, "TrustGeM: Dynamic Trusted Environment Generation and Memory Virtualization for Chip-Multiprocessors", to appear, Int. Symposium on Hardware Oriented Security and Trust (HOST '11)
• L. Bathen et al., "Inter-kernel Data Reuse and Pipelining on Chip-Multiprocessors for Multimedia Applications," 6th IEEE W. on Embedded Systems for Real-time Multimedia (ESTImedia '09), Grenoble, France, Oct 2009
• L. Bathen, S. Pasricha, N. Dutt, "A Framework for Memory-aware Multimedia Application Mapping on Chip-Multiprocessors," 6th IEEE W. on EmbeddedSystems for Real-time Multimedia (ESTImedia '08), Atlanta, GA, Oct 2008

Patents

• Luis Angel Daniel Bathen, Nikil Dutt, "NAERoC: Networked Appliance/Environment Embedded RAIDs-on-Chip," (UCI OTA; #2011-484-1)
• Luis Angel Daniel Bathen, Sandip Agarwala, Divyesh Jadav, "Method for adaptive cost storage optimization for a cloud environment," (Patent Filed, IBM)
• Luis Angel Daniel Bathen, Nikil Dutt, "ERoC: Embedded RAID-on-Chips," (UCI OTA; #2010-688)
• Sandip Agarwala, Luis Angel Daniel Bathen, Divyesh Jadav, Ramani Routray, "SANProxy: System and Method for scalable discovery and monitoring of Storage Area Networks," (Patent Pending, IBM)
• Sandip Agarwala, Luis Angel Daniel Bathen, Divyesh Jadav, Ramani Routray, "Method and apparatus for providing a parallel discovery and monitoring Infrastructure for scalable enterprise systems management," (Patent Pending, IBM)
• Sandip Agarwala, Luis Angel Daniel Bathen, Divyesh Jadav, Ramani Routray, "Systems and methods for implementing progressive discovery in managed IT environment," (Patent Pending, IBM)
• Binny Sher Gill, Luis Angel Daniel Bathen, Thomas Charles Jarvis, and Steven Robert Lowe , "Adjusting Parameters used to Prefetch Data from Storage in Cache," (U.S. Patent And Trademark Office; #20090055595)